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It's nice to meet you!
I'm a huge tech nerd with a passion for computer hardware design, and I've recently received my Bachelor's Of Applied Science in Computer Engineering from the University of Waterloo. I'm super excited to begin working on Apple Silicon CPUs full-time in the coming weeks!
Scroll on to learn about some of my projects, experiences, and for contact info!
You can also click here to download my resume!
Full Time Role
CPU Microarchitect / RTL Engineer @ Apple
Will be working on power-efficient CPU designs beginning June 2026!
Undergraduate Internships
FPGA Design Intern
Altera
PHY Firmware Engineer Intern
Synopsys
Design / Firmware Engineer Intern
Untether AI
ASIC Design & Verification Engineer Intern
Marvell
Networking Silicon Engineer Intern
CPU Performance Engineer Intern
Featured Hardware And Software Projects
Linux-Capable RISC-V Emulator
Pipelined 7-Stage Linux-Capable RISC-V Hardware Implementation
Pipelined 2-Stage RISC-V Hardware Implementation
Uses DMA and SPI peripherals to fake a monochrome composite signal with minimal CPU usage!
There's more where that came from! Check out git.jekel.ca, or my Github and Gitlab profiles to see even more of my projects I couldn't fit here!
Contact Me!
Email: john@jekel.ca or john_jekel@outlook.com
Phone: +1 519 562 3144
University Of Waterloo Student #20956498
Google Sites
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